sh8s_deployer/Makefile

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Makefile
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ECHO = @echo
GCC = g++
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RM = @rm -f
CCFLAGS = -c -g -ansi -pedantic -Wall #optimization?
OBJETS = $(SRC:.cpp=.o)
SRC = $(wildcard *.cpp)
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EXE = deployer
LIBRARIES =
$(EXE) : $(OBJETS)
$(ECHO) "-Linking $(EXE)-"
$(GCC) -o $@ $^ $(LIBRARIES)
%.o:%.cpp
$(ECHO) "-Compilation $<- "
$(GCC) $(CCFLAGS) -o $@ $<
.PHONY: clean
clean:
$(ECHO) "-Cleaning-"
$(RM) $(OBJETS) $(EXE)